The present invention relates to the field of semiconductor processing, and more particularly to the formation of metal gate electrodes.
In the integrated circuit (IC) industry, metal-oxide semiconductor (MOS) transistors have typically been formed utilizing polysilicon gate electrodes. Polysilicon material has been preferred for use as an MOS gate electrode due to its thermal resistive properties (i.e., polysilicon can better withstand subsequent high-temperature processing). Polysilicon""s robustness during high-temperature processing allows polysilicon to be annealed at high temperatures along with source and drain regions. Furthermore, polysilicon""s ability to block the ion implantation of doped atoms into a channel region is advantageous. Due to the ion implantation blocking potential of polysilicon, polysilicon allows for the easy formation of self-aligned source and drain structures after gate patterning is completed.
However, polysilicon gate electrodes have certain disadvantages. For example, polysilicon gate electrodes are formed from semiconductor materials that suffer from higher resistivities than most metal materials. Therefore, polysilicon gate electrodes may operate at much slower speeds than gates made of metallic materials. To partially compensate for the high resistance, polysilicon materials often require extensive and expensive silicide processing in order to increase their speed of operation to acceptable levels.
Metal gates are therefore being investigated as replacements for polysilicon gates. Metal gates are fabricated in a manner that is similar to the fabrication processes for polysilicon gates. An exemplary layer structure is depicted in FIG. 1A of a metal gate structure. Gate oxide layer 12 is first deposited on a substrate 10. A barrier layer 14, made of titanium nitride (TiN), for example, is formed on the gate oxide layer 12. The layer 14 is primarily chosen for appropriate workfunction properties which determine the threshold voltage of the transistor structure. The barrier layer also aids in the adhesion of the subsequently formed metal gate. The TiN can be deposited by conventional methodologies, such as physical vapor deposition (PVD). Alternate materials such as TaN, TaSxNy, WN etc. may be used for this purpose
A metal gate layer 16 is then formed on the barrier layer 14. An exemplary material for the metal gate layer 16 is tungsten, although other materials may be used. The tungsten is deposited by conventional methodologies, such as physical vapor deposition.
A SiRN anti-reflective coating (ARC) 18 is formed on the metal gate layer 16. This is followed by formation of a cap layer 20 over the ARC layer 18. The cap layer 20 may comprise silicon nitride (SiN), for example. The anti-reflective coating 18 and the cap layer 20 aid in the patterning of the gate prior to the reactive ion etch process used to form the gate. Anti-reflective coatings 18, 20 increase the resolution during the lithography process.
After the deposition of the layers 12-20 over the substrate 10, the metal gate is now etched. This is accomplished by conventional patterning and etching techniques. The tungsten layer is typically etched with a fluorine containing chemistry, such as SF6/N2 or SF6/Cl2/N2, with WF6 being the primary product species. The latter chemistry has yielded good profiles. In the latter case, an appropriate SF6/Cl2 ratio may be chosen to provide the best profiles. The recipe may even be richer in Cl2 than in SF6 as required. It is desirable for the etchant to have good selectivity to the TiN of the barrier layer 14 so that the tungsten can be cleared across the entire wafer without attacking the gate oxide. Hence, the TiN ideally serves as an etch stop layer during the etching of the tungsten. An ideal etching process is depicted in FIG. 1B, which shows the patterning of the metal gate electrode by an anisotropic reactive ion etch process, stopping on the TiN at the barrier layer 14. However, this depiction is only an ideal depiction, as the TiN has proven in practice to be an inadequate etch stop layer. As depicted in FIG. 1C, when the tungsten is being cleared from the rest of the wafer, the TiN is completely etched on some parts of the wafer (indicated by reference numeral 22 in FIG. 1C) allowing the etchant to attack the gate oxide 12. This occurs because TiN readily etches in the Cl2 containing W etch chemistry. This results in the gate oxide being exposed either to the F from the W chemistry or being subject to the Cl-based TiN chemistry for the course of the TiN etch, both of which result in damage to the gate oxide. The use of endpoint monitors such as optical emission from W species to stop the W etch from proceeding once the W film clears also does not reliably solve this problem, since the thin TiN film continues to etch quickly while the endpoint is being detected. Thus, even though a TiN etch selective to gate oxide may be employed when W endpoint is detected, the attack of TiN during the W etch process itself makes this approach unreliable in practice. Simply increasing the TiN thickness itself is not practical owing to increases in stress leading to possible delamination and/or an increase in sheet resistance. The complete etching away of the TiN during the tungsten etch leads to degraded gate oxide and decreased yield.
Replacing the TiN with different etch stop material may detrimentally affect the work function of the TiN, and such etch stop material may not exhibit the adhesion properties that are desirable in the TiN. However, there is a need for improved structure that allows the etching of tungsten with a Cl2/SF6/N2 process that properly stops on the etch stop layer and protects the gate oxide across the wafer, without detrimentally affecting the work function of the metal gate.
This and other needs are met by embodiments of the present invention which provide a method of forming a metal gate on a wafer, comprising the steps of forming a gate oxide on a substrate and forming a first metal layer on the gate oxide. The etch selectivity in at least a surface region of the first metal layer is increased. A second metal layer is formed on the first metal layer. The second metal layer is then etched to form a metal gate, with the etching stopping on the surface region of the first metal layer.
In certain embodiments of the invention, the first metal layer comprises TiN and the etch selectivity is increased by implanting a metallic species into the TiN. In certain embodiments of the invention, the metallic species comprises either aluminum or tantalum, depending on the nature of the W etch chemistry. If the W etch chemistry is F-rich, aluminum may be used as the etch stop layer owing to the low vapor pressure of AlF3. On the other hand, if the W etch chemistry is Cl-rich, the much lower vapor pressure of TaCl5 as opposed to TaF5, WF6 and TiCl4 will also result in a significant slowdown of the etch rate, allowing the etch to be terminated when clearing of W is detected. The surface region of the TiN, containing the implanted metallic species, has better etch selectivity than the region of TiN that does not contain the metallic species. The etch selectivity is thereby improved without additional layers, and without significantly affecting the work function of the TiN. Hence, the etching of the tungsten may proceed and stop on the TiN layer, thereby assuredly protecting the gate oxide underlying the etch stop layer and the TiN of the first metal layer. A similar approach may also be used when TaN, TaSiN or WN for example are used as the underlying metal gates, since the F-component of the W etch will readily attack these materials as well as gate oxide. The use of an aluminum implanted layer will provide a chance to switch to Cl2 based etches with suitable additives such as HBr, O2 or N2, where the etch rate of these materials is much lower and also results in increased selectivity to gate oxide materials.
The earlier stated needs are also met by another embodiment of the present invention, which provides a metal gate structure comprising a gate oxide and a first metal layer on the gate oxide. The first metal layer has a surface region with greater etch selectivity than a remaining region of the first metal layer. A second metal layer is on the first metal layer. In certain embodiments of the invention, the first metal layer comprises TiN, and the second metal layer comprises tungsten. In certain embodiments, the TiN has implanted metal in the surface region, this metal comprising tantalum in some embodiments and aluminum in other embodiments.
The earlier stated needs are also met by further embodiments of the present invention, which provide a metal gate structure comprising a TiN layer having a lower region and a surface region with metal impurities. The surface region has greater etch selectivity than the lower region. A tungsten gate is provided on the TiN layer.
The foregoing and other features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.